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STD-DP Series Digital Phase- Locked Module
STD-DP Series Digital Phase- Locked Module
  The STD-DP series digital phase-locked loop (PLL) standard models support frequency multiplication from 10MHz to 100MHz. Due to the use of a digital PLL architecture in the digital lock-in oscillator, the device can flexibly output signals of different frequencies.
Product features

Input 10MHz, output frequency 100MHz

Frequency stability better than 5E-13 per 1 second

Phase noise ≤-160dBc/Hz at 1kHz offset

Input and output frequencies are customizable

Application areas: signal frequency conversion, Rubidium

clock phase noise enhancement, narrowband phase-locked

filtering, clock signal purification, etc.

Product Features

Specification name

Indicator parameters (module)

Specification parameters (crystal oscillator)

RF Input

Input frequency

10MHz

10MHz

Input Power

5dBm~15dBm

5dBm~15dBm

Harmonics/Spurious

-30dBc/-70dBc

-30dBc/-70dBc

Minimum accuracy requirement

≤ ± 3E-7

≤ ± 3E-7

Minimum stability requirement

≤ ± 1E-7

≤ ± 1E-7

RF Output

Output frequency

100MHz (1 channel)

100MHz (1 channel)

Output Power

>7dBm

>7dBm

Harmonics/Spurious

-30dBc/-80dBc

-30dBc/-80dBc

Frequency stability

1s

5E-13

5E-13

10s

8E-14

8E-14

Residual Phase Noise

1Hz

Same as reference (the phase-locked loop's own floor is -88dBc/Hz)

Same as reference (the phase-locked loop's own floor is -88dBc/Hz)

10Hz

-100dBc/Hz

-100dBc/Hz

100Hz

-130dBc/Hz

-130dBc/Hz

1kHz

-160dBc/Hz

-160dBc/Hz

10kHz

-168dBc/Hz

-168dBc/Hz

Supply voltage

Supply voltage

12VDC (Vcc±5%)

12VDC (Vcc±5%)

Power consumption

Module: <3W

Module: <3W

Power interface

Feedthrough Capacitor


environment

Operating temperature

-20 ºC ~ +50 ºC


Storage temperature

-55 ºC ~ +85 ºC


Weight and Size

Weight

<1kg


Size

Module: 50*40*22 Crystal: 20*20*12.5

Crystal oscillator: 25.4*25.4*12.7




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